1. Field
Various embodiments of the present invention relate to a semiconductor design technology, and more particularly, to a bank control circuit for controlling a bank operation, and a semiconductor memory device including the bank control circuit.
2. Description of the Related Art
In order to improve data processing performance, high bandwidth is required for semiconductor memory devices. The number of input/output lines of a semiconductor memory device is increased to have an improved data input/output rate and thus obtain the high bandwidth.
A semiconductor memory device receives an external command and performs an active operation for activating a row, for example, a word line, and a precharge operation for deactivating the row based on the external command. After the row is activated, the semiconductor memory device may perform a read operation or a write operation. When the active operation is performed, signals may remain in the signal lines, such as, data input/output lines and a bit line, that are used for performing a data input/output operation during the active operation. Accordingly, the signal lines have to be precharged into a predetermined level to prepare for the next read or write operation. To this end, the semiconductor memory device has to perform a precharge operation between active operations. Therefore, when another word line is activated in a bank that has performed an active operation, such as, a memory bank, a precharge command is received and a precharge operation is performed first, and then an active command is received again to perform an active operation. However, as the data input/output performance of a semiconductor memory device including a plurality of banks improves, the bandwidth for commands is relatively low, compared with the bandwidth of input/output data.